1. 高性能数模混合集成电路设计。主要开展电源管理芯片、高精度数据转换芯片、脑机接口专用芯片、神经形态类脑计算芯片及感存算一体化芯片的架构设计、电路优化与性能迭代研究，聚焦低功耗、高集成度、高可靠性的芯片设计技术。

2. 端侧算法优化与硬件加速技术。主要围绕机器学习算法轻量化、端侧人工智能模型轻量化部署，开展面向专用场景的AI ASIC芯片架构设计、算法硬件化映射与FPGA并行加速技术研究，聚焦AI智能芯片的硬件适配与高效ASIC实现。

近年代表作：

[1] X. Zhang and A. Basu, A 915–1220 TOPS/W, 976–1301 GOPS Hybrid In-Memory Computing Based Always-On Image Processing for Neuromorphic Vision Sensors, in IEEE Journal of Solid-State Circuits, vol. 58, no. 3, pp. 589-599, March 2023, doi: 10.1109/JSSC.2022.3218573.

[2] X. Zhang, B. -K. An and T. T. -H. Kim, A Robust Time-Based Multi-Level Sensing Circuit for Resistive Memory, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 1, pp. 340-352, Jan. 2023, doi: 10.1109/TCSI. 2022.3211989.

[3] X. Zhang, J. Acharya and A. Basu, A 0.11–0.38 pJ/cycle Differential Ring Oscillator in 65 nm CMOS for Robust Neurocomputing, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 2, pp. 617-630, Feb. 2021, doi: 10.1109/TCSI.2020.3036454.

[4] X. Zhang, V. Mohan and A. Basu, CRAM: Collocated SRAM and DRAM With In-Memory Computing-Based Denoising and Filling for Neuromorphic Vision Sensors in 65 nm CMOS, in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 5, pp. 816-820, May 2020, doi: 10.1109/TCSII.2020.2980125.

[5] X. Zhang and A. Basu, A 915–1220 TOPS/W Hybrid In-Memory Computing based Image Restoration and Region Proposal Integrated Circuit for Neuromorphic Vision Sensors in 65nm CMOS, 2022 IEEE Custom Integrated Circuits Conference (CICC), Newport Beach, CA, USA, 2022, pp. 1-2, doi: 10.1109/CICC53496. 2022.9772788.

每年招收博士生2名，硕士生4名。